Integrated circuits conventionally comprise a substrate, semiconductor devices, and wiring (e.g., metallization) layers formed above the semiconductor devices. The wiring layers comprise various interconnects that provide electrical connections between the devices and external connections.
As interconnect dimensions continue to shrink (e.g., to create smaller devices), and with the adoption of ultra low k interlevel dielectric (ILD) material (e.g., for faster devices), the maximum allowed current density decreases rapidly due to electromigration (EM) effects. Electromigration is a well known phenomena in which, generally speaking, atoms of the interconnect material (e.g., copper) are displaced due to the electrical current passing through the interconnect. The migration of atoms can result in voids in the interconnect, which can increase electrical resistance or cause failure of the interconnect, both of which negatively impact reliability of the integrated circuit.
On the other hand, the desired higher speeds of circuits, use of high k materials, and use of ultra thin gate dielectric requires interconnects to carry higher currents. To meet the demands for higher currents, structures and techniques are needed to enhance interconnect EM performance.
One conventional method to enhance Cu interconnect EM performance is to strengthen the bond at the Cu/cap interface. For example, a capping layer (e.g., cap) is commonly provided between an interconnect and the next wiring level (e.g., ILD) to protect the Cu interconnect from oxidation and to enhance adhesion between the interconnect and the ILD of the next wiring level. The cap is generally a universal cap that covers all of the interconnect structures of a particular wiring level.
A method for strengthening the bond at the Cu/cap interface includes cleaning the entire upper surface of all interconnects of a wiring level with H2 prior to depositing the cap material for that wiring level. The cleaning provides better bond between the Cu and the cap, which improves EM performance of the Cu, but significantly increases the electrical resistance of each interconnect.
Another method for strengthening the bond between the interconnect and the cap is to use alloys (e.g., copper and aluminum) as the material of the interconnect. The use of an alloy slows any EM diffusion in the interconnect, but unacceptably increases the electrical resistance of the interconnect.
An even further method for strengthening the bond between the interconnect and the cap is to use a universal metal cap, such as, for example, a cobalt-tungsten-phosphor (CoWP) cap, over all of the interconnects of a respective wiring level. The universal metal cap creates a strong bond with the Cu of the interconnect, but is very difficult to manufacture. For example, since the universal metal cap covers an entire wiring level, it is difficult to accurately control the thickness of the metal cap. In areas where the metal cap is too thin, it is not effective for EM improvement. In areas where the metal cap is too thick, there are problems with shorting (e.g., with neighboring lines) and with time dependent dielectric breakdown (TDDB).
All of the above-described methods utilize a blanket (e.g., universal) modification in which all of the cap and/or all of the interconnects of a particular wiring level are modified in some form. However, these one-size-fits-all approaches are inefficient in that they unnecessarily increase the electrical resistance of the interconnects and/or are difficult to manufacture.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.